A. Field of the Invention
The present invention relates generally to a semiconductor device.
B. Description of the Related Art
In recent years, in a semiconductor power conversion device, much attention has been paid to the application of a bidirectional switching element to a direct link conversion circuit, such as a matrix converter. The matrix converter performs, for example, AC (alternating current)/AC conversion, AC/DC (direct current) conversion, and DC/AC conversion. Much attention has been paid to the application of the bidirectional switching element to the direct link conversion circuit since the application can reduce the size and weight of a circuit, improve efficiency and response, and reduce costs.
The matrix converter has a higher power conversion efficiency than an inverter/converter. In general, while the inverter/converter generates a DC intermediate voltage from an AC power supply and converts the intermediate voltage into an AC voltage, the matrix converter does not generate the intermediate voltage, but directly generates AC voltage from the AC power supply.
In addition, the lifespan of the inverter/converter is determined by the lifespan of an electrolytic capacitor since the electrolytic capacitor is used as a capacitor for generating the intermediate voltage. In contrast, in the matrix converter, the capacitor for generating the intermediate voltage does not need to be provided between the AC power supply and an AC voltage output unit. Therefore, it is possible to avoid the problems of the inverter/converter.
FIG. 11 is an equivalent circuit diagram illustrating the matrix converter. FIG. 12 is an equivalent circuit diagram illustrating a reverse blocking semiconductor device according to the related art. FIG. 13 is a characteristic diagram illustrating the electrical characteristics of the reverse blocking semiconductor device according to the related art. As illustrated in FIG. 12, power semiconductor element 101 applied to the matrix converter illustrated in FIG. 11 is a reverse blocking semiconductor device with a structure in which two transistors 102 having a reverse breakdown voltage are connected in anti-parallel. As illustrated in FIG. 13, the reverse blocking semiconductor device has a general forward breakdown voltage (a positive voltage is applied to the drain on the basis of source potential) and also has a reverse breakdown voltage (a negative voltage is applied to the drain on the basis of the source potential) with the same level as the forward breakdown voltage.
FIG. 14 is a cross-sectional view illustrating a reverse blocking semiconductor device according to the related art. The reverse blocking semiconductor device illustrated in FIG. 14 has a MOS gate structure including p well region 202, n+ source region 203, gate oxide film 204, gate electrode 205, and source electrode 206 on a front surface of a semiconductor substrate which is n− drift region 201. P-type region (hereinafter, referred to as a field plate (FP)) 207 is provided at the end of the front surface of the semiconductor substrate. P-type region 208 which comes into contact with FP 207 and extends from the front surface to the rear surface of the semiconductor substrate is provided on the side surface of the semiconductor substrate. Drain electrode 209 which comes into contact with n− drift region 201 is provided on the rear surface of the semiconductor substrate.
As the reverse blocking semiconductor device according to the related art, a device has been proposed in which a MOS gate structure including a gate electrode and an emitter electrode is provided in a surface layer of an n− drift layer, which is a semiconductor substrate having a GaN semiconductor or a SiC semiconductor as a main semiconductor crystal, a cross-section for making a chip includes a p-type protective region which connects the front surface and the rear surface of the n− drift layer, and a collector electrode which contacts the rear surface of the n− drift layer includes a Schottky metal film (for example, see JP 2009-123914 A).
As another reverse blocking semiconductor device according to the related art, a device has been proposed which includes a silicon substrate, a buffer layer formed on the silicon substrate, a gallium nitride semiconductor layer formed on the buffer layer, a trench groove which is formed with a depth reaching the gallium nitride semiconductor layer through the silicon substrate and the buffer layer from the rear surface of the silicon substrate, and a metal film formed in the trench groove. In the device, the metal film and the gallium nitride semiconductor layer form a Schottky contact (for example, see JP 2010-258327 A).
However, in the technique disclosed in JP 2009-123914 A, it is difficult to form a semiconductor region of a conduction type different from that of the semiconductor substrate with desired width and depth in the cross-section (hereinafter, referred to as a side surface) of the semiconductor substrate which is cut in a chip shape using, for example, ion implantation and annealing. Therefore, it is necessary to develop a semiconductor device with a structure capable of obtaining a reverse breakdown voltage with ease. In addition, in the technique disclosed in JP 2009-123914 A, there is a concern that a reverse leakage current will increase in the outer circumferential portions of the front and rear surfaces of the semiconductor substrate when a reverse voltage is applied to the drain electrode. When the reverse leakage current is generated, the reverse breakdown voltage is reduced.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.